Next Generation Computer Processor Prototype

The University of Austin has announced the unveiling of a new prototype processor that could be significantly faster than todays fastest processors. Today's processors typically execute four operations at a time. This, in itself, is extremely complex, because the processor must compute the consequences of the first operation while simultaneously beginning to process the other three operations. If the result of the first operation impacts the other three operations, it has to change the way the other three operations are computed to take that into account, and sometimes it must wait for the first operations to complete before going on to the next one (this is called a bubble in the processor).

A weak analogy: suppose you were adding two four digit numbers together. But you wanted to do it really fast, so you decided to add each column in your head simultaneously. The only problem is, if you need to carry a one from the first column, that's going to change your answer for the second column, which in turn might force you to carry a one in that column, and change your answer for the third column, etc. But theoretically, if your brain could do them simultaneously, it's still going to be faster with most numbers, because sometimes carrying will not be necessary. When it is necessary, there will be a "bubble" while you slow yourself down to carry the one.

With computer processors, the operations are more powerful than just adding two single-digit numbers, which makes the logic of determining when a "bubble" is necessary much more complicated.

What the University of Austin has done is extend the width of their processor, so that instead of doing four operations simultaneously it will do sixteen operations simultaneously. Naturally, the logic for guaranteeing that no matter what the sixteen operations are coming in, the processor doesn't fail to take into consideration the first through fifteenth operations while it is already starting on the sixteenth, is extraordinarily complex. Often, the processor will have to "bubble" so much that it will be as slow as a four-operation wide processor. But occasionally, it will intelligently recognize that all sixteen operations can be done simultaneously without impacting each other, and it will be four times faster. It's a delicate balance between the complexity of the circuit, which tends to make the chip slower, and the possibility of zipping through the easy parts, which tends to make it faster.

So the University of Austin's claim is that they have figured out how to make a sixteen-wide chip that is clever enough to know when to run without sleeping the rest of the time. We'll see if the hare beats the tortoise this time!